In order to produce a regulated output voltage, two types of charge pump circuits have conventionally been employed. These charge pump circuits include the linear regulator type, which is capable of producing only a reduction in source voltage, and the switching mode type, which is capable of producing either a reduction or an increase in source voltage. However, each of these conventional charge pump circuits has various limitations. For example, while the ripple voltage is small in the linear regulator type charge pump circuit, the input/output efficiency is low since it can only be used to reduce a source voltage. In the switching mode type charge pump circuit, while either a reduction or an increase in source voltage is possible, a large ripple voltage is also produced. In addition, significant radio frequency noise is generated due to the switching operation. For this reason, efforts have been directed toward the realization of a charge pump circuit which can both increase and reduce a source voltage, which has a small ripple voltage, and which also has desirable radio frequency noise characteristics.
Various types of charge pump circuits have been designed to meet these goals. Such devices generally have capacitors arranged in a plurality of stages, and a switch group for driving the respective capacitors to transfer a charge from a voltage source to an output terminal in order to drive a load with a regulated voltage. For instance, each capacitor may be connected to a pair of switches for transferring charge to the capacitor from a previous stage of the circuit.
The charge pump circuit shown in schematic diagram form in FIG. 2 is one such type of charge pump circuit. This design is disclosed in Japanese Laid-Open Patent No. 63-157667 (U.S. Pat. No. 941,373), entitled "An integrated double load pump power source circuit including power-down characteristics and an RS-232 transmitter/receiver". In this circuit, the charge pump switch group comprises first through fourth switches (SW1-SW4) 101-104. When a first switch (SW1) 101 and a third switch (SW3) 103 are closed, and a second switch (SW2) 102 and a fourth switch (SW4) 104 are open, a charge is transferred to a pump capacitor (C1) 111 from an external power source (V.sub.DD) 100. After an appropriate time period to achieve full charge transfer, the pump capacitor (C1) 111 is charged to the same voltage as that of the external power source (V.sub.DD) 100. Thereafter, the second switch (SW2) 102 and the fourth switch (SW4) 104 are closed, the first switch (SW1) 101 and the third switch (SW3) 103 are opened, and the charge is transferred from the pump capacitor (C1) 111 to an output capacitor (C2) 112. After a sufficient time period to achieve charge transfer, the output capacitor (C2) 112 will also be charged to the same voltage as that of the external power source (V.sub.DD) 100. Since the output capacitor (C2) 112 is connected in series with the pump capacitor (C1) 111, the voltage across output terminal 121 and ground terminal (GND) 120 is twice that of the external power source (V.sub.DD) 100. As will be appreciated by those of ordinary skill in the art, by using the voltage of the output terminal 121 as the power source, fifth through eighth switches (SW5-SW8) 105-108 and third and fourth capacitors (C3, C4) 113, 114 may be driven in the same manner as described above to perform a similar voltage conversion. When this is done, the voltage of output terminal 122 becomes negative, and the absolute value of the voltage is twice that of the power source.
FIG. 3(A) is a block diagram of another type of charge pump circuit as disclosed, for example, in Japanese Laid-Open Patent No. 6351229 entitled, "A charge pump riser circuit with an output voltage stabilizer". In this circuit, the switches SW1-SW4 of the charge pump switch group comprise FETs (TR1-TR4) 101-104. A pulse generator 1 is used for generating a sawtooth waveform (shown as signal A in FIG. 3(B)) for driving the FETs 101-104. A resistor 2, and inverters 4, 5 convert the sawtooth waveform into pulses of the appropriate polarity for use as control signals. For example, the first transistor (TR1) 101 and third transistor (TR3) 103 are first turned ON to transfer charge from the voltage source (V.sub.DD) 100 to the pump capacitor (C1) 111. The first transistor (TR1) 101 and the third transistor (TR3) 103 are then turned OFF and the second transistor (TR2) and the fourth transistor (TR4) 104 are turned ON. Charge is transferred to the output capacitor (C2) 112 to output a voltage having a magnitude of 2.times.V.sub.DD at the output terminal (V.sub.out) 122.
The charge pump circuit of FIG. 3(A) has a structure in which the output voltage is regulated by applying negative feedback from the output terminal (V.sub.out) 122 to the third transistor (TR3) 103 which charges the pump capacitor (C1) 111. In particular, a feedback network is provided comprising a resistor divider having a first resistor R1 and a second resistor R2 for dividing the voltage applied at the output terminal (V.sub.out) 122 and producing a divided output voltage, a reference voltage circuit 115 for generating a reference voltage (V.sub.ref) 116, a comparator 117 for comparing the divided output voltage with the reference voltage (V.sub.ref) 116, a third resistor R3 and a third capacitor C3 for converting the output current of the comparator 117 into a voltage, and a constant current source (ISRC).
As a result of the feedback, the ON time of the third transistor (TR3) 103 (the pulse width "PW" of signal D in FIG. 3(B)) varies, and it is thus possible to adjust the charging level of the pump capacitor (C1) 111 so that the average output voltage from the output terminal (V.sub.out) 122 is a fixed voltage.
The charge pump circuits of FIGS. 2 and 3(A) have various shortcomings. For example, if the external power source voltage for the charge pump circuit of FIG. 2 is V.sub.DD, the output voltage is 2.times.V.sub.DD and -2.times.V.sub.DD. While the output voltage may be increased by connecting a plurality of charge pump circuits in multiple stages (i.e., n stages), the output voltage is n times the voltage of the power source (n being the integer number of voltage increasing stages of the charge pump circuit). The output of this charge pump circuit is therefore limited to an integer multiple of the output voltage V.sub.DD of the external source.
For this reason, when the voltage of the power source (V.sub.DD) 100 changes, the output voltage also changes simultaneously. Consider a charge pump circuit having an output voltage that is twice the voltage of the power source. If three Ni-Cd (Nickel-Cadmium) batteries are connected in series with the power source, at the initial stage the voltage of one battery is initially 1.3 V and the total voltage is initially 3.9 V, so the output voltage is initially 7.8 V. However, when the voltage of the battery falls to 0.9 V, the output voltage of such a charge pump circuit will fall to 5.4 V. If a power source in which voltage falls with a reduction in the current (such as a battery) is used with this kind of charge pump circuit, the output voltage will also gradually decay. There is always a restriction on the range of voltage within which electronic components (ICs and the like) driven by a charge pump circuit as a power source can operate properly. If there is a large variation in the output voltage of the charge pump circuit, there is a possibility that it will go outside the voltage range for proper operation of the IC, preventing it from working properly and causing instability.
The charge pump circuit shown in FIG. 3(A) was designed to overcome this problem. In this circuit, the charge level of the pump capacitor (C1) 111 is adjusted using the value of the output voltage V.sub.out, so that the output voltage is stabilized and the above-mentioned problem is resolved. There are two methods of adjusting the output voltage, involving either varying the ON-time of the third transistor (TR3) 103 or varying the resistance of the third transistor (TR3) 103 when it is ON. These methods employ PWM (pulse width modulation) technology and carry out a fixed cycle of switching, achieving a small ripple voltage.
In order to adjust the charging of the pump capacitor (C1) 111 to control the output voltage at an output terminal (V.sub.out) 122, the gate pulse width ON-time applied to the third transistor (TR3) 103 is controlled using the charge pump circuit shown in FIG. 3(A). However, when the present inventors conducted a precise analysis in simulation, it was found that it was extremely difficult from a technical standpoint to adjust the output voltage using this circuit. The circuit and waveforms used by the inventors in the simulation are shown in FIGS. 4(A) and 4(B), and the conditions were as follows:
Condition 1 (constant for all parts)
VDD (voltage of power source)=5.0 V, f (oscillation frequency)=50 kHz PA1 C1 (pump capacitor)=1 .mu.F, C2 (output capacitor)=10 .mu.F PA1 RSW1 (resistance when TR1 is ON)=RSW2 (resistance when TR2 is ON)=2 .OMEGA. PA1 RSW3 (resistance when TR3 is ON)=RSW4 (resistance when TR4 is ON)=2 .OMEGA. PA1 I.sub.out (output current)=10 mA PA1 * There is no delay on the output of the inverter which drives switches SW1-SW4. PA1 VDD(voltage of power source)=5.0 v, f (oscillation frequency)=50 kHz PA1 C1 (pump capacitor)=1 .mu.F, C2 (output capacitor)=10 .mu.F PA1 RSW1 (resistance when TR1 is ON)=2 .OMEGA. PA1 RSW2 (resistance when TR2 is ON)=RSW4 (resistance when TR4 is ON)=2 .OMEGA. PA1 RSW3 (resistance when TR3 is ON)=2-300 .OMEGA. PA1 I.sub.out (output current)=10 mA PA1 * There is no delay on the output of the inverter which drives switches SW1-SW4.
FIG. 5 shows the relationship between output voltage and pulse width found from the simulation conducted under Condition 1. The maximum output voltage was achieved where there was no feedback current drawn from the output terminal and its value was 2 times V.sub.DD =10 V. When current was drawn from the output terminal, the output voltage was reduced. In order to further reduce the output voltage, the pulse width (hereinafter abbreviated as PW) is shortened. However, as can be seen in FIG. 5, the relationship between output voltage and PW is not proportional, and it is extremely difficult to control output voltage at low voltages.
For example, when the output voltage (V.sub.out) is set at 9.5 V, PW equals 2.1 .mu.s. When V.sub.out equals 9.0 V, PW equals 0.9 .mu.s. In other words, in order to vary an output voltage of 9.5 V by 0.5 V, the length of PW must be varied by approximately 1.2 .mu.s.
When the output voltage is lower than that above, such as 7.0 V, PW=0.28 .mu.s. When the output voltage is set at 6.0 V, PW=0.21 .mu.s. This means that the pulse width is significantly shorter than 1 .mu.s. In varying the output voltage from 7.0 V to 6.0 V, the length of the pulse width varies only by approximately 0.07 .mu.s. Thus, the output voltage can be varied by 1 V by a pulse width as short as 70 ns.
Since the circuit has these characteristics, there are various technical problems encountered in adjusting the output voltage of the circuit in FIG. 3(A). One of these problems is in the switch drive circuit (oscillator). When the output voltage is low, adjustment of the pulse width must be carried out on the level of a few nanoseconds. If a relatively long time is required for the start up and decay of the pulse, it is impossible to adjust the output voltage under these conditions. Start-up and decay time must therefore be kept at less than ins. However, in order for a start-up time of less than ins to be achieved, the switches, oscillators, inverters, comparators and other parts required for the charge pump circuit must all be capable of operating at an extremely high speed. Such high speed elements consume a great deal of current, are difficult to manufacture and are expensive.
Moreover, when using batteries with a high internal impedance as a power source, the fluctuation in voltage of the power source is large due to the high consumption current. Thus, control is even more difficult since the start-up time for the control clock and the pulse width are affected by fluctuations in the power source. Furthermore, since the consumption current is extremely large, the input/output efficiency also falls. When using this kind of battery as a power source, it is very difficult to stabilize the output voltage. Since the input/output conversion efficiency is also extremely low, it is difficult to use with portable equipment.
Thus while it is theoretically possible to adjust the output voltage using the charge pump circuit of FIG. 3(A), the circuit must be controlled at a very high speed, and little effect is seen in terms of stabilizing the output voltage.
Another charge pump circuit designed to alleviate the above-described problems is shown in FIG. 6. By controlling the gate pulse voltage applied to the third transistor (TR3) 103, the resistance when the third transistor (TR3) 103 is ON can be adjusted. However, when the inventors analyzed this circuit in a simulation, it was found that it was very difficult from a technical standpoint to maintain a fixed output voltage using this method.
The circuit and waveforms used in this simulation are shown in FIGS. 7(A) and 7(B). A variable resistor (RSW3) 118 was connected in series with the third switch (SW3) 103 in order to vary the resistance of the third switch (SW3) 103 to form an equivalent circuit.
The operating conditions for each component were as follows:
Condition 2 (constant for all Parts)
FIG. 8 shows the relationship between the resistance of the third switch (RSW3) 118 and the output voltage found from the simulation conducted under Condition 2, with output current I.sub.out as the parameter. As is clear from FIG. 8, since the output voltage and the resistance of the third switch (RSW3) 118 have a proportional relationship, it is easier to control the output voltage than in the charge pump circuit of FIG. 3(A). For example, in order to change V.sub.out from 5 V-9.8 V at I.sub.out =10 mA, it will be sufficient to vary RSW3 over the range 2-24 .OMEGA.. However, since the charge is supplied to the pump capacitor (C1) 111 via a resistance, electrical power is consumed unnecessarily in the resistance and the efficiency of the input/output conversion is thus reduced.
Additional problems occur when the output current is large. Under the condition I.sub.out =100 mA, RSW3 must be varied over the range 2-17 .OMEGA. in order to vary V.sub.out over the range 5 V-7.7 V. Although an FET is used as the third switch (SW3) 103 in the charge pump circuit of FIG. 6, in order to keep this at the resistance value described above, the gate voltage must be adjusted. Even with compensation for variations in the manufacture of the FET, an extremely complicated circuit is required to adjust the value of this resistance. In other words, the higher the output current, the more difficult it is to adjust the output voltage. Thus, the device becomes more expensive and the circuit becomes more complicated. In addition, the consumption current also increases due to the high speed operation required.
When the output voltage is low, the input/output efficiency is poor. On the other hand, when the output current is high, a complicated circuit is required for adjustment. As a result, the charge pump circuit of FIG. 6 has little effect on the stabilization of output voltage.
FIG. 9 shows another type of charge pump circuit intended to eliminate the foregoing problems. This charge pump switch group is identical to that shown in FIG. 3(A). In this circuit, however, first and second pulse generators are used to drive OR gates for providing control signals to the charge pump switch group. The feedback loop includes a resistor divider having a first resistor R1 and a second resistor R2 for dividing the output voltage of the charge pump circuit and producing a divided output voltage, a reference voltage circuit 115 for generating a reference voltage, and a comparator 117 for comparing the reference voltage and the divided output voltage. With the method of control utilized in this circuit, the output voltage of the charge pump circuit is held at a fixed value by intermittently switching the charge pump circuit ON and OFF. Switching is carried out using the comparator 117 and OR gates. The comparator compares the divided output voltage with a reference voltage, and turns off the charge pump switch group when the divided output voltage exceeds the reference voltage. The switching characteristic is such that it does not affect the input/output conversion efficiency. This method of control, known as PFM (pulse frequency modulation), has a drawback in that it includes a ripple in the output voltage caused by fluctuation of the switching frequency. It is not easy to remove this ripple.